Crafting open source standard cell libraries with James Stine

Crafting open source standard cell libraries with James Stine

Author: Matt Venn October 7, 2022 Duration: 35:28
00:00 Intro 03:05 Teo's work on optimising adders 04:35 Proppy's work with Jupyter notebooks 05:32 Open source is the key to innovation 07:51 GF180 08:10 When teaching the design of standard cell libraries, what do students struggle most with? 10:15 What does he think engineers least understand, but should, about standard cells? 12:14 What is your tool flow? 16:00 How many cells do you need in a library? 19:24 Why do we need another cell library for GF180? 20:40 How far are we in terms of opensource tools from commercial tools? 22:20 Liberate 25:20 Does he think automated layout of standard cells will be competitive with hand layout in nanometer processes? 29:21 Are there any circuit families from the past that deserve new attention with Moore's Law slowing down? 33:10 Any theories on why nVidia would make a 7.5T standard cell library? Contact James here: james.stine@okstate.edu or on twitter: https://twitter.com/JamesStineJr

For anyone curious about how the tiny, powerful chips that run our world are actually created, Zero to ASIC Course offers a clear and engaging path through the complex landscape. Hosted by Matt Venn, this podcast demystifies the journey of designing Application-Specific Integrated Circuits (ASICs), breaking down the barriers between abstract concepts and physical silicon. Each episode serves as an informal lesson, weaving together foundational physics, current industry news, and practical engineering insights. You'll hear conversations with practitioners and pioneers who are actively shaping open-source silicon, making a field often shrouded in proprietary secrecy feel accessible and collaborative. This isn't just theoretical; it's about the tools, the challenges, and the community effort to bring custom chip design to more people. By listening to this podcast, you gain a nuanced understanding of semiconductor development, from initial design to final fabrication. The discussions naturally explore the intersection of education, technology, and open-source philosophy, providing context for both newcomers and seasoned engineers looking to stay current. Matt guides the exploration with a focus on real-world application, ensuring that every interview and news segment builds towards a comprehensive, practical knowledge base. Tune in to connect the dots between software, hardware, and the innovative future of computing.
Author: Language: English Episodes: 43

Zero to ASIC Course
Podcast Episodes
Analog ASIC design with digital standard cells! [not-audio_url] [/not-audio_url]

Duration: 439:07:01
For TinyTapeout 3, Harald Pretl made an analog temperature sensor out of digital standard cells. In this interview he explains how he did it.
Jeremy Birch on Tiny Tapeout's static timing analysis [not-audio_url] [/not-audio_url]

Duration: 672:48:21
Jeremy Birch implemented a custom STA timing setup for Tiny Tapeout 3. In this interview we discuss his background, what we needed the check and the results.
September news update: MPW7 & 2, GDS renders, new videos & more! [not-audio_url] [/not-audio_url]

Duration: 4:30
MPW7: https://zerotoasiccourse.com/post/mpw7_submitted/ MPW2: https://groups.google.com/g/skywater-pdk-announce/c/HelusBBUZ20 Efabless Job: https://www.linkedin.com/jobs/view/3293645910/?refId=BA5W4wSSRYOP%2FlHyVfboBw%3D…
July news & Free Silicon Conference 2022 (FSiC22) [not-audio_url] [/not-audio_url]

Duration: 26:29
https://wiki.f-si.org/index.php/FSiC2022 00:00 Intro 01:04 Charles Papon 05:18 Tristan Gingold 09:10 Staf Verhaegen 11:30 Naohiko Shimizu 16:38 Tim Edwards 20:46 Harald Pretl 21:40 Mirjana Videnovic-Misic