Diego Hernando - analog circuits on the Google/Skywater/Efabless ASIC shuttle

Diego Hernando - analog circuits on the Google/Skywater/Efabless ASIC shuttle

Author: Matt Venn March 12, 2021 Duration: 29:49
00:36? Diego's background
01:30? choice of design and the new tools
02:50? digital vs analog process
09:05? op-amp specifications
12:35? schematic in xschem
13:40? open loop testbench
14:26? spice setup
15:37? simulation results
17:44? layout in magic
23:20? opamps placed in the user project wrapper of Caravel
27:20? testing the ASIC

Diego on linked.in: https://www.linkedin.com/in/diego-joa...?
Diego's ASIC submission: https://github.com/diegohernando/cara...?
xschem: https://xschem.sourceforge.io/stefan/...?


For anyone curious about how the tiny, powerful chips that run our world are actually created, Zero to ASIC Course offers a clear and engaging path through the complex landscape. Hosted by Matt Venn, this podcast demystifies the journey of designing Application-Specific Integrated Circuits (ASICs), breaking down the barriers between abstract concepts and physical silicon. Each episode serves as an informal lesson, weaving together foundational physics, current industry news, and practical engineering insights. You'll hear conversations with practitioners and pioneers who are actively shaping open-source silicon, making a field often shrouded in proprietary secrecy feel accessible and collaborative. This isn't just theoretical; it's about the tools, the challenges, and the community effort to bring custom chip design to more people. By listening to this podcast, you gain a nuanced understanding of semiconductor development, from initial design to final fabrication. The discussions naturally explore the intersection of education, technology, and open-source philosophy, providing context for both newcomers and seasoned engineers looking to stay current. Matt guides the exploration with a focus on real-world application, ensuring that every interview and news segment builds towards a comprehensive, practical knowledge base. Tune in to connect the dots between software, hardware, and the innovative future of computing.
Author: Language: English Episodes: 43

Zero to ASIC Course
Podcast Episodes
Crafting open source standard cell libraries with James Stine [not-audio_url] [/not-audio_url]

Duration: 35:28
00:00 Intro 03:05 Teo's work on optimising adders 04:35 Proppy's work with Jupyter notebooks 05:32 Open source is the key to innovation 07:51 GF180 08:10 When teaching the design of standard cell libraries, what do stude…
Interview with Dinesh A - Riscduino [not-audio_url] [/not-audio_url]

Duration: 27:32
Interview with Dinesh A - Riscduino00:00 Intro00:45 about Dinesh02:39 Aim of Riscduino04:50 Aim to be pin compatible and with support of compiler and libraries06:10 Join the project - Dinesh is looking for help with anal…
February news update! [not-audio_url] [/not-audio_url]

Duration: 4:47
MPW1 lives, chip scans, epoxy, Efabless, CLEAR FPGA, Makercast & hackchat
January news update [not-audio_url] [/not-audio_url]

Duration: 2:47
January news update!MPW1 silicon & bringup, MPW4 submitted, MPW5 tapeout
December news update [not-audio_url] [/not-audio_url]

Duration: 3:52
Carlos' twitter space: https://twitter.com/carlosedp/status/1469355189891125255 Silicon compiler: https://www.siliconcompiler.com/ Amaranth: https://github.com/amaranth-lang/amaranth MPW2 rerun: https://efabless.com/proj…
Interview with Staf from Chips4Makers [not-audio_url] [/not-audio_url]

Duration: 25:39
In this interview we talk about Staf's recent tapeout, the flexcell standard cell generator and pdk master - a kind of API for pdks.Staf also gives his opinions on the state of the industry and whether we at an inflectio…
November news update [not-audio_url] [/not-audio_url]

Duration: 4:16
Lots of open source ASIC news from November. Check the youtube description for all the links.https://youtu.be/goOzeELjjnI