Lakshmi S - Designing a PLL for the Google/Skywater/Efabless ASIC shuttle

Lakshmi S - Designing a PLL for the Google/Skywater/Efabless ASIC shuttle

Author: Matt Venn March 12, 2021 Duration: 24:31
00:00? introduction
01:04? worked under Kunal Ghosh as an intern: https://www.vlsisystemdesign.com/basi...? 02:18? Questions from Niklas - time it takes, what's frustrating, fun? 05:40? Are the tools ready for mixed signal designs - DRC violations in Caravel. 07:20? Question from Pepijn - what would you need to change to alter the PLL? 08:44? PLL overview 10:00? Lakshmi's design: Frequency divider 12:22? Phase frequency detector 13:32? Charge pump 14:37? Voltage controlled oscillator 16:40? combined designs with Diego Hernando 17:10? putting into the Caravel wrapper, adding space 18:56? Question from Brady - why design an integrated loop filter 20:01? Questions from Top - are there schematics? Process corners and ngspice convergence 22:05? Question from Steven: post silicon testing Lakshmi on Linked.in: https://www.linkedin.com/in/lakshmis96/? Repo: https://github.com/lakshmi-sathi/avsd...

For anyone curious about how the tiny, powerful chips that run our world are actually created, Zero to ASIC Course offers a clear and engaging path through the complex landscape. Hosted by Matt Venn, this podcast demystifies the journey of designing Application-Specific Integrated Circuits (ASICs), breaking down the barriers between abstract concepts and physical silicon. Each episode serves as an informal lesson, weaving together foundational physics, current industry news, and practical engineering insights. You'll hear conversations with practitioners and pioneers who are actively shaping open-source silicon, making a field often shrouded in proprietary secrecy feel accessible and collaborative. This isn't just theoretical; it's about the tools, the challenges, and the community effort to bring custom chip design to more people. By listening to this podcast, you gain a nuanced understanding of semiconductor development, from initial design to final fabrication. The discussions naturally explore the intersection of education, technology, and open-source philosophy, providing context for both newcomers and seasoned engineers looking to stay current. Matt guides the exploration with a focus on real-world application, ensuring that every interview and news segment builds towards a comprehensive, practical knowledge base. Tune in to connect the dots between software, hardware, and the innovative future of computing.
Author: Language: English Episodes: 43

Zero to ASIC Course
Podcast Episodes
Matt Guthaus - OpenRAM [not-audio_url] [/not-audio_url]

Duration: 31:56
In this interview with Matt Guthaus, we talk about: Recap - what is OpenRAMWhy do we need a memory compiler like OpenRAM?3 phases of OpenRAM developmentWhat’s changed since FOSSi dialupMPW2 tapeout of OpenRAMTest modesWh…
Dirk Koch & Nguyen Dao - Fabulous embedded FPGAs [not-audio_url] [/not-audio_url]

Duration: 39:09
One of the popular types of entries to MPW1 & 2 have been FPGAs. I have previously spoken with Arya Reais-Parsi about their FPGA project submitted to MPW1. In MPW2 I noticed there were a couple of applications that seeme…
Dan Rodrigues - first shuttle, racing the beam & retro gaming [not-audio_url] [/not-audio_url]

Duration: 31:14
00:00 Introducing Dan Rodrigues 01:15 Dan was on the first shuttle 02:30 Converting an FPGA project to an ASIC 03:17 How long it took to prepare his submission? 05:17 What kind of config changes were required? 07:50 VDP-…